x86 svm: Fix PAT MSR handling when using Nested Paging.

Accesses to the MSR should not be intercepted.

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>

diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index 7366ecd22b6052d19fc9c21414f79cc32c8fa36f..6f1f087d88171cc6945d9d8525ee7c3173cac84f 100644 (file)
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -243,6 +243,9 @@ static int construct_vmcb(struct vcpu *v)
          * that need to be fixed up.
          */
         vmcb->general1_intercepts &= ~GENERAL1_INTERCEPT_INVLPG;
+
+        /* PAT is under complete control of SVM when using nested paging. */
+        svm_disable_intercept_for_msr(v, MSR_IA32_CR_PAT);
     }
     else
     {